1. Field of the Invention
The present invention relates to ferroelectric semiconductor memory devices and a method for reading the same, and more particularly, to a ferroelectric semiconductor memory device including a plurality of ferroelectric memory cells, each memory cell including a ferroelectric capacitor and a transistor connected thereto, and a method for reading information written in the ferroelectric semiconductor memory device.
2. Description of the Related Art
Semiconductor memory devices include ferroelectric memories (FeRAM) such as a TC parallel unit series-connected ferroelectric memory. The TC parallel unit series-connected FeRAM includes a plurality of ferroelectric memory cells, each memory cell including a ferroelectric capacitor and a transistor connected thereto.
Proposed configurations for the conventional ferroelectric memories such as the TC parallel unit series-connected FeRAM include a 1T1C scheme described in JPH 09-120700 and a 2T2C scheme. These schemes allow for high integration of the ferroelectric memory cells by allowing them to share a plate line.
Other proposed schemes than the 1T1C scheme and 2T2C scheme include a 1T2C scheme as described in “1998 symposium on VLSI technology digest of technical papers,” pp. 124-125. This scheme uses a reference voltage of Vcc/2 [V] when reading, thereby facilitating the circuit design of the sense circuit and allowing for stable reading.